WSF:
SUBSTRATE EFFECTS IN SI RFIC INTERCONNECT

Date & Time: Sunday, June 11; 8:00 AM to 12:00 PM

Location: Moscone Convention Center, TBD

Topics & Speakers:

• Modeling of Interconnects and Spiral Inductors in Silicon RFICs, A. Weisshaar, Oregon State University
• Simulation and Modeling of Substrate Coupling, M. Steer, North Carolina State University
• Strategies for Successful characterization of RFIC Passive Components and Functional Block Signal Integrity with Electromagnetic Analysis, B. Brim, Ansoft Corp.
• CMOS RF Design Techniques to Mitigate Substrate Parasitic Effects, D. Allstot, University of Washington

Organizers: J. Dunn, Applied Wave Research

Sponsors: MTT-23 RFIC

Silicon RFIC technology normally requires that there be a lossy silicon substrate. Substrate effects make it more difficult to develop accurate passive component and interconnect models. The substrate creates a number of problems for the designer: eddy current losses, coupling between digital and analog blocks, poorly defined signal path return and ground. In this workshop, we will examine how substrate issues are being addressed by CAD support modeling experts and high speed IC design engineers. Time is allocated for attendees to share their own insights and experiences.