| WSE:
NOISE MEASUREMENTS AND MODELING FOR CMOS
Date & Time: Sunday, June 11; 8:00 AM to 5:00 PM
Location: Moscone Convention Center, TBD
Topics & Speakers:
- Noise Parameter Characterization Techniques for CMOS Devices, Ali Boudiaf, Maury Microwave
- On-Wafer Noise-Parameter Measurement and Uncertainty Analysis at NIST, James Randa, NIST
- Alternative Parameter Sets and Insights into MOS Thermal Noise Behavior, Thomas McKay and G. Ali Rezvani, RF Micro Devices
- Modeling of Noise in Three Terminal Microwave Devices (FETs, HBTs) as Applied to CMOS Devices, Marian Pospieszalski, National Radio Astronomy Observatory
- Modeling of RF Noise in MOSFETS with Industry Standard Models, James Victory, Jazz Semiconductor
- RF Noise Modeling of MOSFETs Including Gate Current Effects, M. Jamal Deen, McMaster University
- RF Noise Characterization and Modeling of Deep-submicron CMOS, A.J. Scholten, Philips Research Laboratories Eindhoven
- The Evolving Understanding of Noise Physics in Scaled Technologies and the Implications for Device Modeling and Data Interpretation, David Greenberg, IBM
Organizers:
Jim Randa, NIST
Tom McKay, RF Micro Devices
Sponsors:
MTT-14 Microwave Low-Noise Techniques
MTT-11 Microwave Measurements
MTT-23 RFIC
CMOS technology, driven by a 30 years trend of increasing functionality of digital integrated circuits, continues to gain favor for an increasing range of low-noise radio-frequency applications. At the same time, noise figure continues to decrease with transistor gate length, challenging our ability to measure and extract intrinsic parameters. Moreover, future devices may bring into play new physical effects with unforeseen impact, increasing the need for characterization methods relying on few assumptions, valid at the specific frequencies of interest. This workshop will cover the current status and challenges in the measurement and modeling of the noise properties of CMOS devices, particularly at frequencies in the low microwave range. We will review present noise-parameter measurement methods, their capabilities, and their limitations for CMOS transistors. The modeling implications of measurement data will be discussed, along with possible new directions in relating noise measurements to models. Different approaches to the modeling of the noise properties of these devices will be presented, as will methods for the extraction of model parameters from measurement data. It is hoped that the workshop will stimulate and provide a basis for further improvements in the measurement and modeling of noise in CMOS devices, particularly at frequencies around 1–10 GHz. |