WSN:
High Frequency Noise in Advanced Silicon-based Devices

From Basics to State-of-the-Art Device and Circuit Performance

Date & Time: Sunday, June6; 1:00 to 5:00 PM
Location: Fort Worth Convention Center, Room 203C

Topics & Speakers:

• Fundamentals of Noisy Circuits, Their Modeling and Measurements as Applied to Modern Semiconductor Devices,
  Marian Pospieszalski, National Radio Astronomy Observatory
  
• Noise Modeling and Performance of SOI MOSFETs,
  François Danneville, IEMN-CNRS
  
• CMOS Device Noise Extraction and Performance,
  Jamal Deen, McMaster University
  
• HBT Noise Performance,
  David Greenberg, IBM
  
• Low Noise Amplifiers in CMOS: From Device to Circuit Design,
  Marc Tiebout, Ralf Brederlow, Christoph Kienmayer, and Edvin Paparisto, Infineon Technologies
  
• SiGe HBT Designs,
  David Homol, Motorola

Organizers:

François Danneville, IEMN-CNRS
Luciano Boglione, IECi

Sponsors:

MTT-6: Microwave and Millimeter-Wave Integrated Circuits
MTT-14: Microwave Low Noise Techniques
MTT-23: RF Integrated Circuits
2004 RFIC Symposium

This half day workshop will cover the important topic of high frequency noise in silicon devices and circuits. The first presentation will provide the necessary definitions and basic concepts for the workshop attendee to move through the many topics that are outlined subsequently; measurement techniques will also be introduced as well as basic limitations of the modern devices. The next presenters will focus on the noise characteristics of Silicon On Insulator (SOI) MOSFETs, CMOS and HBT devices. Attention will be paid to the modeling of these devices and an ample array of results will be presented to understand limitations and future trends in the development of new devices. Finally, the workshop will concentrate on the theory and performance of low noise circuits in CMOS and SiGe HBTs. A wide range of state-of-the-art results will be made available for the attendees to appreciate and discuss. These results will cover low noise amplifiers as well as the noise performance of complex circuits that are the every day challenge for the modern silicon designer.