WSL:
ESD Protection for RFIC's: Science or Black Magic?

Date & Time: Sunday, June 6; 8:00AM to 12:00 NOON
Location: Fort Worth Convention Center, Room 203C

Topics & Speakers:

• ESD Protection for Sub-Quarter-Micron CMOS Circuits,
  Dr. T.C. Ong, Taiwan Semiconductor Manufacturing Company
  
• Compact MOSFET Model for Electrostatic Discharge (ESD) Applications,
  Prof. Juin J. Liou, University of Central Florida
  
• Modeling Requirements for Simulation of ESD Protected RFICs,
  Prof. Elyse Rosenbaum, University of Illinois at Urbana-Champaign
  
• Design Methodology of ESD Protection Circuits for RFICs,
  Prof. Albert Wang, Illinois Institute of Technology
  
• ESD Protection for an 802.11a CMOS Transceiver with L-C Tuned Circuits,
  Prof. Patrick Yue, Carnegie Mellon University

Organizers:

C. Patrick Yue, Carnegie Mellon University
Albert Wang, Illinois Institute of Technology

Sponsors:

MTT-6: Microwave and Millimeter-Wave Integrated Circuits
MTT-23: RF Integrated Circuits
2004 RFIC Symposium

As wireless communication standards move towards higher frequency band for more bandwidth, the loading effects on the RF I/O pins due to electrostatic discharge (ESD) protection devices become increasingly difficult to overcome. Today, trial-and-error remains to be the dominant approach for qualifying RF ESD protection designs, which is costly and tedious. RFIC designers are often responsible for the design of ESD protection circuits for the RF ports. The purpose of this half-day workshop is to provide the attendants with practical ESD know-how’s from a circuit design perspective. This workshop will begin with an overview of ESD device physics and reliability issues in today's deep-sub-micron technology. The challenges and recent advancements in ESD device modeling, simulation techniques and CAD tools will be presented. Finally, RF ESD circuit design methodology will be addressed followed by a description of the ESD design strategy employed in a 5-GHz CMOS IEEE 802.11a transceiver.