IEEE Radio Frequency Integrated Circuits Symposium

RFIC 2004


WSH:
Mixed Signal Design Methodology & Environment

Date & Time: Sunday, June 6; 8:00 AM to 5:00 PM
Location: Fort Worth Convention Center, Room 204B

Topics & Speakers:

  • Mixed signal IC and Module Design Flow; Present and Future,
    Jyoti Mondal and Glenn Raskin, Motorola.
  • Mixed Signal IC Design Methodology; Presently Adopted and Future Requirements,
    Claire Jackoski and Jan Niehof, Philips
  • VHDL, A Mixed Signal Simulator for RF Systems Solutions,
    Christian Münker, Infineon
  • Integration of Circuit and System Analysis for 802.11 Applications,
    Stephen Maas, Microwave Office
  • NeoRF – A Real Time, Parasitic-Cognizant, RF Design Methodology,
    Aykut Dengi, Neolinear
  • System to Circuit Level Design and Verification of a Wireless LAN Example,
    Tom Phillips, Agilent Technology
  • An Integrated Environment for Mixed Signal IC and Module Development,
    Kurt Johnson, Cadence
  • Design Trade-offs for Wireless Analog Baseband Circuits in Nanometer CMOS,
    Jerry Lin, Texas Instruments
  • Top Level Mixed Signal IC Verification Using a Fast MOS Solver,
    Joe Pertu and Angelo Espinoza, Synopsys

Organizer:

Jyoti Mondal, Motorola Semiconductors

Sponsors:

MTT-6: Microwave and Millimeter-Wave Integrated Circuits
MTT-7: Microwave and Millimeter-Wave Solid State Devices
MTT-16: Microwave Systems
MTT-23: RF Integrated Circuits
2004 RFIC Symposium

Today’s famous buzzwords are single chip radio and system on a chip (SOC). There are some formidable design challenges to overcome before these buzzwords become reality. The challenges lie in multiple design environments and the top level verification of a mixed signal IC. A conventional RF designer not only has to have a sound knowledge in RF design, he needs to analyze circuits from other domains in an integrated design environment. The other domains include digital and analog. The digital circuits include Serial Peripheral Interface (SPI) and other control circuits for RF and analog blocks. The analog circuits include biasing networks as well as base band circuits < 5MHz. After various circuit blocks are connected on an IC, two issues need to be addressed: 1) top level verification that checks the connectivity, and, 2) Co-simulation of all the blocks in a single design environment that checks the electrical specification of the IC.

Using some examples, this workshop will focus on the above two issues in the mixed signal IC design environment. Design tool vendors are working on various aspects of the issues and developing new tools. The user community has started applying these tools in the mixed signal IC designs.

This workshop will present the progress and status on the tools by the vendors followed by examples from the user community that has used these tools on mixed signal ICs.